Attachment 136486 Details for Bug 104451 – DP link training errors in dmesg with drm.debug=0x1e

DP link training errors in dmesg with drm.debug=0x1e

file_104451.txt (text/plain), 203.77 KB, created by Direx on 2018-01-02 08:48:49 UTC

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Creator: Direx

Created: 2018-01-02 08:48:49 UTC

Size: 203.77 KB

patch

obsolete

>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 00 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 00 00
>[drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 00 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 00 00
>[drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 00 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 00 00
>[drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 00 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 00 00
>[drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[drm:drm_add_display_info [drm]] non_desktop set to 0
>[drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[drm:drm_add_display_info [drm]] non_desktop set to 0
>[drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[drm:drm_edid_to_eld [drm]] ELD monitor Q2775
>[drm:drm_edid_to_eld [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[drm:intel_connector_update_modes [i915]] ELD size 28, SAD count 1
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 89:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[drm:drm_mode_prune_invalid [drm]] Not using 2560x1440 mode: VIRTUAL_X
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1280x1440" 60 156000 1280 1376 1512 1744 1440 1443 1453 1493 0x40 0x6
>[drm:drm_mode_prune_invalid [drm]] Not using 1280x1440 mode: VIRTUAL_Y
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:61:DP-3] probed modes :
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 91:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:84:DP-4]
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:84:DP-4] disconnected
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:86:DP-5]
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:86:DP-5] disconnected
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 59 enabled? yes
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 67 enabled? no
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 71 enabled? no
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 74 enabled? no
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 78 enabled? no
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 61 enabled? yes
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 84 enabled? no
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 86 enabled? no
>[drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 59
>[drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 59 0
>[drm:drm_setup_crtcs [drm_kms_helper]] found mode 1920x1080
>[drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 61
>[drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 61 0
>[drm:drm_setup_crtcs [drm_kms_helper]] found mode 1920x1080
>[drm:drm_setup_crtcs [drm_kms_helper]] picking CRTCs for 1920x1080 config
>[drm:drm_setup_crtcs [drm_kms_helper]] desired mode 1920x1080 set on crtc 37 (0,0)
>[drm:drm_setup_crtcs [drm_kms_helper]] desired mode 1920x1080 set on crtc 47 (0,0)
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 00 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_modeset_retry_work_fn [i915]] [CONNECTOR:74:DP-2]
>[drm:drm_fb_helper_hotplug_event.part.24 [drm_kms_helper]] 
>[drm:drm_setup_crtcs [drm_kms_helper]] 
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1]
>[drm:intel_dp_detect [i915]] [CONNECTOR:59:eDP-1]
>[drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:drm_add_display_info [drm]] non_desktop set to 0
>[drm:drm_add_display_info [drm]] non_desktop set to 0
>[drm:intel_connector_update_modes [i915]] ELD: no CEA Extension found
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1] probed modes :
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 60:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:67:DP-1]
>[drm:intel_dp_detect [i915]] [CONNECTOR:67:DP-1]
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:67:DP-1] disconnected
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:HDMI-A-1]
>[drm:intel_hdmi_detect [i915]] [CONNECTOR:71:HDMI-A-1]
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 00 00
>[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:HDMI-A-1] disconnected
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:74:DP-2]
>[drm:intel_dp_detect [i915]] [CONNECTOR:74:DP-2]
>[drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 00 05 01 83 02 00 00 00 00 00 00
>[drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 90-cc-24 dev-ID SYNA#" HW-rev 1.0 SW-rev 2.33 quirks 0x0000
>[drm:intel_dp_detect [i915]] Sink is MST capable
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:74:DP-2] disconnected
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-2]
>[drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-2]
>[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] timed out, falling back to bit banging on pin 4
>[drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] timed out, falling back to bit banging on pin 4
>[drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-2] disconnected
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:61:DP-3]
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 00 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 00 00
>[drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 10 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 10 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 00 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>NET: Registered protocol family 38
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 00 00
>[drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 10 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 10 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[drm:drm_add_display_info [drm]] non_desktop set to 0
>[drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[drm:drm_add_display_info [drm]] non_desktop set to 0
>[drm:drm_add_display_info [drm]] HDMI: DVI dual 0, max TMDS clock 300000 kHz
>[drm:drm_edid_to_eld [drm]] ELD monitor Q2775
>[drm:drm_edid_to_eld [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[drm:intel_connector_update_modes [i915]] ELD size 28, SAD count 1
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 88:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x48 0x5
>[drm:drm_mode_prune_invalid [drm]] Not using 2560x1440 mode: VIRTUAL_X
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1280x1440" 60 156000 1280 1376 1512 1744 1440 1443 1453 1493 0x40 0x6
>[drm:drm_mode_prune_invalid [drm]] Not using 1280x1440 mode: VIRTUAL_Y
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 160:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[drm:drm_mode_prune_invalid [drm]] Not using 1920x1080i mode: NO_INTERLACE
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:61:DP-3] probed modes :
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 124:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 91:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 108:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 110:"832x624" 75 57284 832 864 928 1152 624 625 628 667 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 101:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:84:DP-4]
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:84:DP-4] disconnected
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:86:DP-5]
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:86:DP-5] disconnected
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 59 enabled? yes
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 67 enabled? no
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 71 enabled? no
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 74 enabled? no
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 78 enabled? no
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 61 enabled? yes
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 84 enabled? no
>[drm:drm_setup_crtcs [drm_kms_helper]] connector 86 enabled? no
>[drm:intel_fb_initial_config [i915]] Not using firmware configuration
>[drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 59
>[drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 59 0
>[drm:drm_setup_crtcs [drm_kms_helper]] found mode 1920x1080
>[drm:drm_setup_crtcs [drm_kms_helper]] looking for cmdline mode on connector 61
>[drm:drm_setup_crtcs [drm_kms_helper]] looking for preferred mode on connector 61 0
>[drm:drm_setup_crtcs [drm_kms_helper]] found mode 1920x1080
>[drm:drm_setup_crtcs [drm_kms_helper]] picking CRTCs for 1920x1080 config
>[drm:drm_setup_crtcs [drm_kms_helper]] desired mode 1920x1080 set on crtc 37 (0,0)
>[drm:drm_setup_crtcs [drm_kms_helper]] desired mode 1920x1080 set on crtc 47 (0,0)
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 00 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_modeset_retry_work_fn [i915]] [CONNECTOR:74:DP-2]
>[drm:drm_fb_helper_hotplug_event.part.24 [drm_kms_helper]] 
>[drm:drm_setup_crtcs [drm_kms_helper]] 
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1]
>[drm:intel_dp_detect [i915]] [CONNECTOR:59:eDP-1]
>[drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[drm:drm_dp_read_desc [drm_kms_helper]] DP sink: OUI 00-00-00 dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>[drm:drm_add_display_info [drm]] non_desktop set to 0
>[drm:drm_add_display_info [drm]] non_desktop set to 0
>[drm:intel_connector_update_modes [i915]] ELD: no CEA Extension found
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:59:eDP-1] probed modes :
>[drm:drm_mode_debug_printmodeline [drm]] Modeline 60:"1920x1080" 60 138700 1920 1968 2000 2080 1080 1083 1088 1111 0x48 0x9
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:67:DP-1]
>[drm:intel_dp_detect [i915]] [CONNECTOR:67:DP-1]
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:67:DP-1] disconnected
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:HDMI-A-1]
>[drm:intel_hdmi_detect [i915]] [CONNECTOR:71:HDMI-A-1]
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpb
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 00 00
>[drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] timed out, falling back to bit banging on pin 5
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:71:HDMI-A-1] disconnected
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:74:DP-2]
>[drm:intel_dp_detect [i915]] [CONNECTOR:74:DP-2]
>[drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 00 05 01 83 02 00 00 00 00 00 00
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 90-cc-24 dev-ID SYNA#" HW-rev 1.0 SW-rev 2.33 quirks 0x0000
>[drm:intel_dp_detect [i915]] Sink is MST capable
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:74:DP-2] disconnected
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-2]
>[drm:intel_hdmi_detect [i915]] [CONNECTOR:78:HDMI-A-2]
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 00 00
>[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] timed out, falling back to bit banging on pin 4
>[drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] timed out, falling back to bit banging on pin 4
>[drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:78:HDMI-A-2] disconnected
>[drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:61:DP-3]
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 00 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 00 00
>[drm:intel_dp_hpd_pulse [i915]] got hpd irq on port C - short
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times
>[drm:intel_dp_start_link_train [i915]] [CONNECTOR:74:DP-2] Link Training failed at link rate = 540000, lane count = 4
>[drm:intel_dp_check_mst_status [i915]] got esi 01 10 00
>[drm:gen8_irq_handler [i915]] hotplug event received, stat 0x00400000, dig 0x10101110, pins 0x00000040
>[drm:intel_hpd_irq_handler [i915]] digital hpd port C - short
>[drm:intel_dp_check_mst_status [i915]] got esi2 01 10 00
>[drm:intel_dp_check_mst_status [i915]] channel EQ not ok, retraining
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[drm:intel_dp_start_link_train [i915]] Same voltage tried 5 times

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Attachments on bug 104451: 136486 | 136515

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