Attachment 15332 Details for Bug 15108 – Different crash

Different crash

Xorg.0.log.old (text/plain), 84.85 KB, created by Nicolas Cedilnik on 2008-03-20 04:18:00 UTC

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Creator: Nicolas Cedilnik

Created: 2008-03-20 04:18:00 UTC

Size: 84.85 KB

patch

obsolete

>
>This is a pre-release version of the X server from The X.Org Foundation.
>It is not supported in any way.
>Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
>Select the "xorg" product for bugs you find in this release.
>Before reporting bugs in pre-release versions please check the
>latest version in the X.Org Foundation git repository.
>See http://wiki.x.org/wiki/GitPage for git access instructions.
>
>X.Org X Server 1.4.0.90
>Release Date: 5 September 2007
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.24-ARCH i686 
>Current Operating System: Linux thebeast 2.6.24-ARCH #1 SMP PREEMPT Wed Mar 5 12:07:52 UTC 2008 i686
>Build Date: 16 March 2008  08:36:32PM
> 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Thu Mar 20 02:29:55 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "X.org Configured"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "Monitor0"
>(**) |   |-->Device "Card0"
>(**) |-->Input Device "Mouse0"
>(**) |-->Input Device "Keyboard0"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(==) Including the default font path /usr/share/fonts/misc,/usr/share/fonts/100dpi:unscaled,/usr/share/fonts/75dpi:unscaled,/usr/share/fonts/TTF,/usr/share/fonts/Type1.
>(**) FontPath set to:
>	/usr/share/fonts/misc,
>	/usr/share/fonts/100dpi:unscaled,
>	/usr/share/fonts/75dpi:unscaled,
>	/usr/share/fonts/TTF,
>	/usr/share/fonts/Type1,
>	/usr/share/fonts/misc,
>	/usr/share/fonts/100dpi:unscaled,
>	/usr/share/fonts/75dpi:unscaled,
>	/usr/share/fonts/TTF,
>	/usr/share/fonts/Type1
>(**) RgbPath set to "/usr/share/X11/rgb"
>(**) ModulePath set to "/usr/lib/xorg/modules"
>(WW) Open ACPI failed (/var/run/acpid.socket) (No such file or directory)
>(II) No APM support in BIOS or kernel
>(II) Loader magic: 0x81d74e0
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 2.0
>	X.Org XInput driver : 2.0
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on linux
>(II) LoadModule: "pcidata"
>(II) Loading /usr/lib/xorg/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(++) using VT number 7
>
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:00:0: chip 8086,29c0 card 8086,5044 rev 02 class 06,00,00 hdr 00
>(II) PCI: 00:02:0: chip 8086,29c2 card 8086,5044 rev 02 class 03,00,00 hdr 80
>(II) PCI: 00:02:1: chip 8086,29c3 card 8086,5044 rev 02 class 03,80,00 hdr 80
>(II) PCI: 00:03:0: chip 8086,29c4 card 8086,5044 rev 02 class 07,80,00 hdr 80
>(II) PCI: 00:19:0: chip 8086,294c card 8086,0001 rev 02 class 02,00,00 hdr 00
>(II) PCI: 00:1a:0: chip 8086,2937 card 8086,5044 rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1a:1: chip 8086,2938 card 8086,5044 rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1a:2: chip 8086,2939 card 8086,5044 rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1a:7: chip 8086,293c card 8086,5044 rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1b:0: chip 8086,293e card 8086,4001 rev 02 class 04,03,00 hdr 00
>(II) PCI: 00:1c:0: chip 8086,2940 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:1: chip 8086,2942 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:2: chip 8086,2944 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:3: chip 8086,2946 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:4: chip 8086,2948 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1d:0: chip 8086,2934 card 8086,5044 rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1d:1: chip 8086,2935 card 8086,5044 rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:2: chip 8086,2936 card 8086,5044 rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:7: chip 8086,293a card 8086,5044 rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1e:0: chip 8086,244e card 0000,0000 rev 92 class 06,04,01 hdr 01
>(II) PCI: 00:1f:0: chip 8086,2916 card 8086,5044 rev 02 class 06,01,00 hdr 80
>(II) PCI: 00:1f:2: chip 8086,2822 card 8086,5044 rev 02 class 01,04,00 hdr 00
>(II) PCI: 00:1f:3: chip 8086,2930 card 8086,5044 rev 02 class 0c,05,00 hdr 00
>(II) PCI: 03:00:0: chip 11ab,6101 card 11ab,6101 rev b1 class 01,01,8f hdr 00
>(II) PCI: 06:03:0: chip 11c1,5811 card 11c1,5811 rev 70 class 0c,00,10 hdr 00
>(II) PCI: End of PCI scan
>(II) Intel Bridge workaround enabled
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,6), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 1: bridge is at (0:28:0), (0,1,1), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 1 non-prefetchable memory range:
>	[0] -1	0	0x90500000 - 0x905fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 2: bridge is at (0:28:1), (0,2,2), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 2 non-prefetchable memory range:
>	[0] -1	0	0x90600000 - 0x906fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 3: bridge is at (0:28:2), (0,3,3), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 3 I/O range:
>	[0] -1	0	0x00001000 - 0x000010ff (0x100) IX[B]
>	[1] -1	0	0x00001400 - 0x000014ff (0x100) IX[B]
>	[2] -1	0	0x00001800 - 0x000018ff (0x100) IX[B]
>	[3] -1	0	0x00001c00 - 0x00001cff (0x100) IX[B]
>(II) Bus 3 non-prefetchable memory range:
>	[0] -1	0	0x90100000 - 0x901fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 4: bridge is at (0:28:3), (0,4,4), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 4 non-prefetchable memory range:
>	[0] -1	0	0x90700000 - 0x907fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 5: bridge is at (0:28:4), (0,5,5), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 5 non-prefetchable memory range:
>	[0] -1	0	0x90800000 - 0x908fffff (0x100000) MX[B]
>(II) Subtractive PCI-to-PCI bridge:
>(II) Bus 6: bridge is at (0:30:0), (0,6,6), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 6 non-prefetchable memory range:
>	[0] -1	0	0x90000000 - 0x900fffff (0x100000) MX[B]
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(--) PCI:*(0:2:0) Intel Corporation 82G33/G31 Express Integrated Graphics Controller rev 2, Mem @ 0x90380000/19, 0x80000000/28, 0x90200000/20, I/O @ 0x2130/3
>(--) PCI: (0:2:1) Intel Corporation 82G33/G31 Express Integrated Graphics Controller rev 2, Mem @ 0x90300000/19
>(II) Addressable bus resource ranges are
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>	[1] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) Active PCI resource ranges:
>	[0] -1	0	0x90000000 - 0x90000fff (0x1000) MX[B]
>	[1] -1	0	0x90100000 - 0x901001ff (0x200) MX[B]
>	[2] -1	0	0x90426000 - 0x904260ff (0x100) MX[B]
>	[3] -1	0	0x90425000 - 0x904257ff (0x800) MX[B]
>	[4] -1	0	0x90425800 - 0x90425bff (0x400) MX[B]
>	[5] -1	0	0x90420000 - 0x90423fff (0x4000) MX[B]
>	[6] -1	0	0x90425c00 - 0x90425fff (0x400) MX[B]
>	[7] -1	0	0x90424000 - 0x90424fff (0x1000) MX[B]
>	[8] -1	0	0x90400000 - 0x9041ffff (0x20000) MX[B]
>	[9] -1	0	0x90426100 - 0x9042610f (0x10) MX[B]
>	[10] -1	0	0x90300000 - 0x9037ffff (0x80000) MX[B](B)
>	[11] -1	0	0x90200000 - 0x902fffff (0x100000) MX[B](B)
>	[12] -1	0	0x80000000 - 0x8fffffff (0x10000000) MX[B](B)
>	[13] -1	0	0x90380000 - 0x903fffff (0x80000) MX[B](B)
>	[14] -1	0	0x00001000 - 0x0000100f (0x10) IX[B]
>	[15] -1	0	0x00001020 - 0x00001023 (0x4) IX[B]
>	[16] -1	0	0x00001010 - 0x00001017 (0x8) IX[B]
>	[17] -1	0	0x00001024 - 0x00001027 (0x4) IX[B]
>	[18] -1	0	0x00001018 - 0x0000101f (0x8) IX[B]
>	[19] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]
>	[20] -1	0	0x00002020 - 0x0000203f (0x20) IX[B]
>	[21] -1	0	0x00002138 - 0x0000213b (0x4) IX[B]
>	[22] -1	0	0x00002120 - 0x00002127 (0x8) IX[B]
>	[23] -1	0	0x0000213c - 0x0000213f (0x4) IX[B]
>	[24] -1	0	0x00002128 - 0x0000212f (0x8) IX[B]
>	[25] -1	0	0x00002040 - 0x0000205f (0x20) IX[B]
>	[26] -1	0	0x00002060 - 0x0000207f (0x20) IX[B]
>	[27] -1	0	0x00002080 - 0x0000209f (0x20) IX[B]
>	[28] -1	0	0x000020a0 - 0x000020bf (0x20) IX[B]
>	[29] -1	0	0x000020c0 - 0x000020df (0x20) IX[B]
>	[30] -1	0	0x000020e0 - 0x000020ff (0x20) IX[B]
>	[31] -1	0	0x00002100 - 0x0000211f (0x20) IX[B]
>	[32] -1	0	0x00002130 - 0x00002137 (0x8) IX[B](B)
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0x90000000 - 0x90000fff (0x1000) MX[B]
>	[1] -1	0	0x90100000 - 0x901001ff (0x200) MX[B]
>	[2] -1	0	0x90426000 - 0x904260ff (0x100) MX[B]
>	[3] -1	0	0x90425000 - 0x904257ff (0x800) MX[B]
>	[4] -1	0	0x90425800 - 0x90425bff (0x400) MX[B]
>	[5] -1	0	0x90420000 - 0x90423fff (0x4000) MX[B]
>	[6] -1	0	0x90425c00 - 0x90425fff (0x400) MX[B]
>	[7] -1	0	0x90424000 - 0x90424fff (0x1000) MX[B]
>	[8] -1	0	0x90400000 - 0x9041ffff (0x20000) MX[B]
>	[9] -1	0	0x90426100 - 0x9042610f (0x10) MX[B]
>	[10] -1	0	0x90300000 - 0x9037ffff (0x80000) MX[B](B)
>	[11] -1	0	0x90200000 - 0x902fffff (0x100000) MX[B](B)
>	[12] -1	0	0x80000000 - 0x8fffffff (0x10000000) MX[B](B)
>	[13] -1	0	0x90380000 - 0x903fffff (0x80000) MX[B](B)
>	[14] -1	0	0x00001000 - 0x0000100f (0x10) IX[B]
>	[15] -1	0	0x00001020 - 0x00001023 (0x4) IX[B]
>	[16] -1	0	0x00001010 - 0x00001017 (0x8) IX[B]
>	[17] -1	0	0x00001024 - 0x00001027 (0x4) IX[B]
>	[18] -1	0	0x00001018 - 0x0000101f (0x8) IX[B]
>	[19] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]
>	[20] -1	0	0x00002020 - 0x0000203f (0x20) IX[B]
>	[21] -1	0	0x00002138 - 0x0000213b (0x4) IX[B]
>	[22] -1	0	0x00002120 - 0x00002127 (0x8) IX[B]
>	[23] -1	0	0x0000213c - 0x0000213f (0x4) IX[B]
>	[24] -1	0	0x00002128 - 0x0000212f (0x8) IX[B]
>	[25] -1	0	0x00002040 - 0x0000205f (0x20) IX[B]
>	[26] -1	0	0x00002060 - 0x0000207f (0x20) IX[B]
>	[27] -1	0	0x00002080 - 0x0000209f (0x20) IX[B]
>	[28] -1	0	0x000020a0 - 0x000020bf (0x20) IX[B]
>	[29] -1	0	0x000020c0 - 0x000020df (0x20) IX[B]
>	[30] -1	0	0x000020e0 - 0x000020ff (0x20) IX[B]
>	[31] -1	0	0x00002100 - 0x0000211f (0x20) IX[B]
>	[32] -1	0	0x00002130 - 0x00002137 (0x8) IX[B](B)
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x90000000 - 0x90000fff (0x1000) MX[B]
>	[5] -1	0	0x90100000 - 0x901001ff (0x200) MX[B]
>	[6] -1	0	0x90426000 - 0x904260ff (0x100) MX[B]
>	[7] -1	0	0x90425000 - 0x904257ff (0x800) MX[B]
>	[8] -1	0	0x90425800 - 0x90425bff (0x400) MX[B]
>	[9] -1	0	0x90420000 - 0x90423fff (0x4000) MX[B]
>	[10] -1	0	0x90425c00 - 0x90425fff (0x400) MX[B]
>	[11] -1	0	0x90424000 - 0x90424fff (0x1000) MX[B]
>	[12] -1	0	0x90400000 - 0x9041ffff (0x20000) MX[B]
>	[13] -1	0	0x90426100 - 0x9042610f (0x10) MX[B]
>	[14] -1	0	0x90300000 - 0x9037ffff (0x80000) MX[B](B)
>	[15] -1	0	0x90200000 - 0x902fffff (0x100000) MX[B](B)
>	[16] -1	0	0x80000000 - 0x8fffffff (0x10000000) MX[B](B)
>	[17] -1	0	0x90380000 - 0x903fffff (0x80000) MX[B](B)
>	[18] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[19] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[20] -1	0	0x00001000 - 0x0000100f (0x10) IX[B]
>	[21] -1	0	0x00001020 - 0x00001023 (0x4) IX[B]
>	[22] -1	0	0x00001010 - 0x00001017 (0x8) IX[B]
>	[23] -1	0	0x00001024 - 0x00001027 (0x4) IX[B]
>	[24] -1	0	0x00001018 - 0x0000101f (0x8) IX[B]
>	[25] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]
>	[26] -1	0	0x00002020 - 0x0000203f (0x20) IX[B]
>	[27] -1	0	0x00002138 - 0x0000213b (0x4) IX[B]
>	[28] -1	0	0x00002120 - 0x00002127 (0x8) IX[B]
>	[29] -1	0	0x0000213c - 0x0000213f (0x4) IX[B]
>	[30] -1	0	0x00002128 - 0x0000212f (0x8) IX[B]
>	[31] -1	0	0x00002040 - 0x0000205f (0x20) IX[B]
>	[32] -1	0	0x00002060 - 0x0000207f (0x20) IX[B]
>	[33] -1	0	0x00002080 - 0x0000209f (0x20) IX[B]
>	[34] -1	0	0x000020a0 - 0x000020bf (0x20) IX[B]
>	[35] -1	0	0x000020c0 - 0x000020df (0x20) IX[B]
>	[36] -1	0	0x000020e0 - 0x000020ff (0x20) IX[B]
>	[37] -1	0	0x00002100 - 0x0000211f (0x20) IX[B]
>	[38] -1	0	0x00002130 - 0x00002137 (0x8) IX[B](B)
>(II) "extmod" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dbe" will be loaded. This was enabled by default and also specified in the config file.
>(II) "glx" will be loaded. This was enabled by default and also specified in the config file.
>(II) "freetype" will be loaded. This was enabled by default and also specified in the config file.
>(II) "record" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dri" will be loaded. This was enabled by default and also specified in the config file.
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "record"
>(II) Loading /usr/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension RECORD
>(II) LoadModule: "dri"
>(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(==) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "xtrap"
>(II) Loading /usr/lib/xorg/modules/extensions//libxtrap.so
>(II) Module xtrap: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DEC-XTRAP
>(II) LoadModule: "freetype"
>(II) Loading /usr/lib/xorg/modules/fonts//libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.4.0.90, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "intel"
>(II) Loading /usr/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 2.2.1
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 2.0
>(II) LoadModule: "mouse"
>(II) Loading /usr/lib/xorg/modules/input//mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.2.3
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) LoadModule: "kbd"
>(II) Loading /usr/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.4.0, module version = 1.2.2
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33, Intel Integrated Graphics Device
>(II) Primary Device is: PCI 00:02:0
>(WW) intel: No matching Device section for instance (BusID PCI:0:2:1) found
>(--) Chipset G33 found
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x90000000 - 0x90000fff (0x1000) MX[B]
>	[5] -1	0	0x90100000 - 0x901001ff (0x200) MX[B]
>	[6] -1	0	0x90426000 - 0x904260ff (0x100) MX[B]
>	[7] -1	0	0x90425000 - 0x904257ff (0x800) MX[B]
>	[8] -1	0	0x90425800 - 0x90425bff (0x400) MX[B]
>	[9] -1	0	0x90420000 - 0x90423fff (0x4000) MX[B]
>	[10] -1	0	0x90425c00 - 0x90425fff (0x400) MX[B]
>	[11] -1	0	0x90424000 - 0x90424fff (0x1000) MX[B]
>	[12] -1	0	0x90400000 - 0x9041ffff (0x20000) MX[B]
>	[13] -1	0	0x90426100 - 0x9042610f (0x10) MX[B]
>	[14] -1	0	0x90300000 - 0x9037ffff (0x80000) MX[B](B)
>	[15] -1	0	0x90200000 - 0x902fffff (0x100000) MX[B](B)
>	[16] -1	0	0x80000000 - 0x8fffffff (0x10000000) MX[B](B)
>	[17] -1	0	0x90380000 - 0x903fffff (0x80000) MX[B](B)
>	[18] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[19] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[20] -1	0	0x00001000 - 0x0000100f (0x10) IX[B]
>	[21] -1	0	0x00001020 - 0x00001023 (0x4) IX[B]
>	[22] -1	0	0x00001010 - 0x00001017 (0x8) IX[B]
>	[23] -1	0	0x00001024 - 0x00001027 (0x4) IX[B]
>	[24] -1	0	0x00001018 - 0x0000101f (0x8) IX[B]
>	[25] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]
>	[26] -1	0	0x00002020 - 0x0000203f (0x20) IX[B]
>	[27] -1	0	0x00002138 - 0x0000213b (0x4) IX[B]
>	[28] -1	0	0x00002120 - 0x00002127 (0x8) IX[B]
>	[29] -1	0	0x0000213c - 0x0000213f (0x4) IX[B]
>	[30] -1	0	0x00002128 - 0x0000212f (0x8) IX[B]
>	[31] -1	0	0x00002040 - 0x0000205f (0x20) IX[B]
>	[32] -1	0	0x00002060 - 0x0000207f (0x20) IX[B]
>	[33] -1	0	0x00002080 - 0x0000209f (0x20) IX[B]
>	[34] -1	0	0x000020a0 - 0x000020bf (0x20) IX[B]
>	[35] -1	0	0x000020c0 - 0x000020df (0x20) IX[B]
>	[36] -1	0	0x000020e0 - 0x000020ff (0x20) IX[B]
>	[37] -1	0	0x00002100 - 0x0000211f (0x20) IX[B]
>	[38] -1	0	0x00002130 - 0x00002137 (0x8) IX[B](B)
>(II) resource ranges after probing:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x90000000 - 0x90000fff (0x1000) MX[B]
>	[5] -1	0	0x90100000 - 0x901001ff (0x200) MX[B]
>	[6] -1	0	0x90426000 - 0x904260ff (0x100) MX[B]
>	[7] -1	0	0x90425000 - 0x904257ff (0x800) MX[B]
>	[8] -1	0	0x90425800 - 0x90425bff (0x400) MX[B]
>	[9] -1	0	0x90420000 - 0x90423fff (0x4000) MX[B]
>	[10] -1	0	0x90425c00 - 0x90425fff (0x400) MX[B]
>	[11] -1	0	0x90424000 - 0x90424fff (0x1000) MX[B]
>	[12] -1	0	0x90400000 - 0x9041ffff (0x20000) MX[B]
>	[13] -1	0	0x90426100 - 0x9042610f (0x10) MX[B]
>	[14] -1	0	0x90300000 - 0x9037ffff (0x80000) MX[B](B)
>	[15] -1	0	0x90200000 - 0x902fffff (0x100000) MX[B](B)
>	[16] -1	0	0x80000000 - 0x8fffffff (0x10000000) MX[B](B)
>	[17] -1	0	0x90380000 - 0x903fffff (0x80000) MX[B](B)
>	[18] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[19] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[20] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[21] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[22] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[23] -1	0	0x00001000 - 0x0000100f (0x10) IX[B]
>	[24] -1	0	0x00001020 - 0x00001023 (0x4) IX[B]
>	[25] -1	0	0x00001010 - 0x00001017 (0x8) IX[B]
>	[26] -1	0	0x00001024 - 0x00001027 (0x4) IX[B]
>	[27] -1	0	0x00001018 - 0x0000101f (0x8) IX[B]
>	[28] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]
>	[29] -1	0	0x00002020 - 0x0000203f (0x20) IX[B]
>	[30] -1	0	0x00002138 - 0x0000213b (0x4) IX[B]
>	[31] -1	0	0x00002120 - 0x00002127 (0x8) IX[B]
>	[32] -1	0	0x0000213c - 0x0000213f (0x4) IX[B]
>	[33] -1	0	0x00002128 - 0x0000212f (0x8) IX[B]
>	[34] -1	0	0x00002040 - 0x0000205f (0x20) IX[B]
>	[35] -1	0	0x00002060 - 0x0000207f (0x20) IX[B]
>	[36] -1	0	0x00002080 - 0x0000209f (0x20) IX[B]
>	[37] -1	0	0x000020a0 - 0x000020bf (0x20) IX[B]
>	[38] -1	0	0x000020c0 - 0x000020df (0x20) IX[B]
>	[39] -1	0	0x000020e0 - 0x000020ff (0x20) IX[B]
>	[40] -1	0	0x00002100 - 0x0000211f (0x20) IX[B]
>	[41] -1	0	0x00002130 - 0x00002137 (0x8) IX[B](B)
>	[42] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[43] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Loading /usr/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "vbe"
>(II) LoadModule: "vbe"
>(II) Loading /usr/lib/xorg/modules//libvbe.so
>(II) Module vbe: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.1.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 2.0
>(==) intel(0): Depth 24, (==) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "ModeDebug" "yes"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) G33
>(--) intel(0): Chipset: "G33"
>(--) intel(0): Linear framebuffer at 0x80000000
>(--) intel(0): IO registers at addr 0x90380000
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x8030000c (enabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00300000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x8030000c (enabled, pipe A, no stall, +hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00300000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x18000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000c80 (3200 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x80000203 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00021509 (n = 2, m1 = 21, m2 = 9)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0xd4040033 (enabled, dvo, default clock, DAC/serial mode, p1 = 3, p2 = 10, SDVO mult 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x031f027f (640 start, 800 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020c01df (480 start, 525 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x0124008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0): MI_DISPLAY_POWER_DOW: 0x00000000
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x20
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x06
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x08
>(II) intel(0):                 AR09: 0x09
>(II) intel(0):                 AR0a: 0x0a
>(II) intel(0):                 AR0b: 0x0b
>(II) intel(0):                 AR0c: 0x0c
>(II) intel(0):                 AR0d: 0x0d
>(II) intel(0):                 AR0e: 0x0e
>(II) intel(0):                 AR0f: 0x0f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 100800 n 2 m1 21 m2 9 p1 3 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(==) intel(0): Using EXA for acceleration
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"(II) Module "i2c" already built-in
>(II) intel(0): Output VGA using monitor section Monitor0
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): I2C bus "SDVOB DDC Bus" initialized.
>(II) intel(0): SDVO: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) intel(0): SDVO: R: 02 43 00 01 01 01 01 00 (Success)
>(II) intel(0): Output TMDS-1 has no monitor section
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) intel(0): SDVO: R: C4 09 20 4E             (Success)
>(II) intel(0): SDVO device VID/DID: 02:43.00, clock range 25.0MHz - 200.0MHz, input 1: Y, input 2: N, output 1: Y, output 2: N
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72.
>(II) intel(0): No SDVO device found on SDVOC
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" removed.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" removed.
>(II) intel(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R: 08                      (Success)
>(II) intel(0): Current clock rate multiplier: 8
>(II) intel(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R: 01 00                   (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: D6 09 80 A0 20 E0 2D 10 (Success)
>(II) intel(0): SDVO: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 10 60 A2 00 1C 00 00 00 (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: D6 09 80 A0 20 E0 2D 10 (Success)
>(II) intel(0): SDVO: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 10 60 A2 00 1C 00 00 00 (Success)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): EDID for output VGA
>(II) intel(0): SDVO: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVO: R: 01 00                   (Success)
>(II) intel(0): I2C device "SDVOB DDC Bus:ddc2" registered at address 0xA0.
>(II) intel(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVO: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): EDID for output TMDS-1
>(II) intel(0): Manufacturer: VSC  Model: 711c  Serial#: 16843009
>(II) intel(0): Year: 2005  Week: 47
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max H-Image Size [cm]: horiz.: 41  vert.: 26
>(II) intel(0): Gamma: 2.20
>(II) intel(0): DPMS capabilities: Off; RGB/Color Display
>(II) intel(0): Default color space is primary color space
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.636 redY: 0.349   greenX: 0.290 greenY: 0.589
>(II) intel(0): blueX: 0.143 blueY: 0.080   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Supported VESA Video Modes:
>(II) intel(0): 720x400@70Hz
>(II) intel(0): 640x480@60Hz
>(II) intel(0): 640x480@67Hz
>(II) intel(0): 640x480@72Hz
>(II) intel(0): 640x480@75Hz
>(II) intel(0): 800x600@56Hz
>(II) intel(0): 800x600@60Hz
>(II) intel(0): 800x600@72Hz
>(II) intel(0): 800x600@75Hz
>(II) intel(0): 832x624@75Hz
>(II) intel(0): 1024x768@60Hz
>(II) intel(0): 1024x768@70Hz
>(II) intel(0): 1024x768@75Hz
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported Future Video Modes:
>(II) intel(0): #0: hsize: 1440  vsize 900  refresh: 60  vid: 149
>(II) intel(0): #1: hsize: 1280  vsize 1024  refresh: 60  vid: 32897
>(II) intel(0): #2: hsize: 1280  vsize 960  refresh: 60  vid: 16513
>(II) intel(0): #3: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>(II) intel(0): #4: hsize: 1024  vsize 768  refresh: 85  vid: 22881
>(II) intel(0): #5: hsize: 800  vsize 600  refresh: 85  vid: 22853
>(II) intel(0): #6: hsize: 640  vsize 480  refresh: 85  vid: 22833
>(II) intel(0): #7: hsize: 640  vsize 400  refresh: 70  vid: 2609
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 106.5 MHz   Image Size:  410 x 256 mm
>(II) intel(0): h_active: 1440  h_sync: 1520  h_sync_end 1672 h_blank_end 1904 h_border: 0
>(II) intel(0): v_active: 900  v_sync: 903  v_sync_end 909 v_blanking: 934 v_border: 0
>(II) intel(0): Serial No: PXD054703541
>(II) intel(0): Ranges: V min: 50  V max: 85 Hz, H min: 30  H max: 82 kHz, PixClock max 140 MHz
>(II) intel(0): Monitor name: VA1912wSERIES
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff005a631c7101010101
>(II) intel(0): 	2f0f010380291a782ed7a5a2594a9624
>(II) intel(0): 	145054bfee00950081808140714f6159
>(II) intel(0): 	45593159310a9a29a0d0518422305098
>(II) intel(0): 	36009a001100001c000000ff00505844
>(II) intel(0): 	3035343730333534310a000000fd0032
>(II) intel(0): 	551e520e000a202020202020000000fc
>(II) intel(0): 	0056413139313277534552494553008a
>(II) intel(0): EDID vendor "VSC", prod id 28956
>(II) intel(0): Not using mode "640x400" (mode clock too low)
>(II) intel(0): Not using default mode "640x350" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x400" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "720x400" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1152x864" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x960" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x960" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1792x1344" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1792x1344" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1856x1392" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1856x1392" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "832x624" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x800" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1152x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1152x864" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1400x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1400x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1400x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1400x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1440x900" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1680x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "2048x1536" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "2048x1536" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "2048x1536" (bad mode clock/interlace/doublescan)
>(II) intel(0): Printing probed modes for output TMDS-1
>(II) intel(0): Modeline "1440x900"x59.9  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz)
>(II) intel(0): Modeline "1280x1024"x59.9  109.00  1280 1368 1496 1712  1024 1027 1034 1063 -hsync +vsync (63.7 kHz)
>(II) intel(0): Modeline "1440x900"x59.9  106.50  1440 1528 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz)
>(II) intel(0): Modeline "1280x960"x59.9  101.25  1280 1360 1488 1696  960 963 967 996 -hsync +vsync (59.7 kHz)
>(II) intel(0): Modeline "1152x864"x74.8  104.00  1152 1224 1344 1536  864 867 871 905 -hsync +vsync (67.7 kHz)
>(II) intel(0): Modeline "1024x768"x84.9   94.50  1024 1096 1200 1376  768 771 775 809 -hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.1   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x84.9   56.75  800 848 928 1056  600 603 607 633 -hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x84.6   35.00  640 664 728 816  480 483 487 507 -hsync +vsync (42.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x66.7   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz)
>(II) intel(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) intel(0): Output VGA disconnected
>(II) intel(0): Output TMDS-1 connected
>(II) intel(0): Output TMDS-1 using initial mode 1440x900
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 17 10 60 A2 00 1C 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 10 60 A2 00 1C 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 08                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): detected 1024 kB GTT.
>(II) intel(0): detected 7164 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Will not try to enable page flipping
>(==) intel(0): Triple buffering disabled
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(==) intel(0): DPI set to (96, 96)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) Loading sub module "exa"
>(II) LoadModule: "exa"
>(II) Loading /usr/lib/xorg/modules//libexa.so
>(II) Module exa: vendor="X.Org Foundation"
>	compiled for 1.4.0.90, module version = 2.2.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"(II) Module "ramdac" already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] 0	0	0x90200000 - 0x902fffff (0x100000) MS[B]
>	[1] 0	0	0x80000000 - 0x8fffffff (0x10000000) MS[B]
>	[2] 0	0	0x90380000 - 0x903fffff (0x80000) MS[B]
>	[3] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[4] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[5] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[6] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[7] -1	0	0x90000000 - 0x90000fff (0x1000) MX[B]
>	[8] -1	0	0x90100000 - 0x901001ff (0x200) MX[B]
>	[9] -1	0	0x90426000 - 0x904260ff (0x100) MX[B]
>	[10] -1	0	0x90425000 - 0x904257ff (0x800) MX[B]
>	[11] -1	0	0x90425800 - 0x90425bff (0x400) MX[B]
>	[12] -1	0	0x90420000 - 0x90423fff (0x4000) MX[B]
>	[13] -1	0	0x90425c00 - 0x90425fff (0x400) MX[B]
>	[14] -1	0	0x90424000 - 0x90424fff (0x1000) MX[B]
>	[15] -1	0	0x90400000 - 0x9041ffff (0x20000) MX[B]
>	[16] -1	0	0x90426100 - 0x9042610f (0x10) MX[B]
>	[17] -1	0	0x90300000 - 0x9037ffff (0x80000) MX[B](B)
>	[18] -1	0	0x90200000 - 0x902fffff (0x100000) MX[B](B)
>	[19] -1	0	0x80000000 - 0x8fffffff (0x10000000) MX[B](B)
>	[20] -1	0	0x90380000 - 0x903fffff (0x80000) MX[B](B)
>	[21] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[22] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[23] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[24] 0	0	0x00002130 - 0x00002137 (0x8) IS[B]
>	[25] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[26] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[27] -1	0	0x00001000 - 0x0000100f (0x10) IX[B]
>	[28] -1	0	0x00001020 - 0x00001023 (0x4) IX[B]
>	[29] -1	0	0x00001010 - 0x00001017 (0x8) IX[B]
>	[30] -1	0	0x00001024 - 0x00001027 (0x4) IX[B]
>	[31] -1	0	0x00001018 - 0x0000101f (0x8) IX[B]
>	[32] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]
>	[33] -1	0	0x00002020 - 0x0000203f (0x20) IX[B]
>	[34] -1	0	0x00002138 - 0x0000213b (0x4) IX[B]
>	[35] -1	0	0x00002120 - 0x00002127 (0x8) IX[B]
>	[36] -1	0	0x0000213c - 0x0000213f (0x4) IX[B]
>	[37] -1	0	0x00002128 - 0x0000212f (0x8) IX[B]
>	[38] -1	0	0x00002040 - 0x0000205f (0x20) IX[B]
>	[39] -1	0	0x00002060 - 0x0000207f (0x20) IX[B]
>	[40] -1	0	0x00002080 - 0x0000209f (0x20) IX[B]
>	[41] -1	0	0x000020a0 - 0x000020bf (0x20) IX[B]
>	[42] -1	0	0x000020c0 - 0x000020df (0x20) IX[B]
>	[43] -1	0	0x000020e0 - 0x000020ff (0x20) IX[B]
>	[44] -1	0	0x00002100 - 0x0000211f (0x20) IX[B]
>	[45] -1	0	0x00002130 - 0x00002137 (0x8) IX[B](B)
>	[46] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[47] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 485120 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 1940476 kB available
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: Open failed
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: open result is -1, (No such device or address)
>drmOpenDevice: Open failed
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 7, (OK)
>drmOpenByBusid: drmOpenMinor returns 7
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) [drm] loaded kernel module for "i915" driver.
>(II) [drm] DRM interface version 1.3
>(II) [drm] DRM open master succeeded.
>(II) intel(0): [drm] Using the DRM lock SAREA also for drawables.
>(II) intel(0): [drm] framebuffer mapped by ddx driver
>(II) intel(0): [drm] added 1 reserved context for kernel
>(II) intel(0): X context handle = 0x1
>(II) intel(0): [drm] installed DRM signal handler
>(==) intel(0): VideoRam: 262144 KB
>(**) intel(0): Framebuffer compression disabled
>(**) intel(0): Tiling enabled
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Success.
>(II) intel(0): Increasing the scanline pitch to allow tiling mode (1472 -> 2048).
>(II) intel(0): [drm] Registers = 0x90380000
>(II) intel(0): [drm] ring buffer = 0x80000000
>(II) intel(0): [drm] mapped front buffer at 0x81000000, handle = 0x81000000
>(II) intel(0): [drm] mapped back buffer at 0x85000000, handle = 0x85000000
>(II) intel(0): [drm] mapped depth buffer at 0x86000000, handle = 0x86000000
>(II) intel(0): [drm] mapped classic textures at 0x87000000, handle = 0x87000000
>(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432
>(II) intel(0): [dri] visual configs initialized
>(II) intel(0): Page Flipping disabled
>(==) intel(0): Write-combining range (0x80000000,0x10000000)
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) EXA(0): Offscreen pixmap area of 35389440 bytes
>(II) EXA(0): Driver registered support for the following operations:
>(II)         Solid
>(II)         Copy
>(II)         Composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): [DRI] installation complete
>(II) intel(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R: 08                      (Success)
>(II) intel(0): Current clock rate multiplier: 8
>(II) intel(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R: 01 00                   (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: D6 09 80 A0 20 E0 2D 10 (Success)
>(II) intel(0): SDVO: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 10 60 A2 00 1C 00 00 00 (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: D6 09 80 A0 20 E0 2D 10 (Success)
>(II) intel(0): SDVO: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 10 60 A2 00 1C 00 00 00 (Success)
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x01000000 (pgoffset 4096)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x02000000 (pgoffset 8192)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x05000000 (pgoffset 20480)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x06000000 (pgoffset 24576)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x07000000 (pgoffset 28672)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
>(II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB)
>(II) intel(0): 0x00032000-0x00032fff: overlay registers (4 kB)
>(II) intel(0): 0x00033000-0x00033fff: HW status (4 kB)
>(II) intel(0): 0x006ff000:            end of stolen memory
>(II) intel(0): 0x01000000-0x01ffffff: front buffer (11520 kB) X tiled
>(II) intel(0): 0x02000000-0x041bffff: exa offscreen (34560 kB)
>(II) intel(0): 0x05000000-0x05ffffff: back buffer (11520 kB) X tiled
>(II) intel(0): 0x06000000-0x06ffffff: depth buffer (11520 kB) X tiled
>(II) intel(0): 0x07000000-0x08ffffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "1440x900"x59.9  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz)
>chosen: dotclock 106560 vco 2131200 ((m 111, m1 18, m2 9), n 3, (p 20, p1 2, p2 10))
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 9A 29 A0 D0 51 84 22 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 17 50 98 36 00 1C 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 9A 29 A0 D0 51 84 22 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 50 98 36 00 1C 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x8048008c (enabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00300000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x8048008c (enabled, pipe A, no stall, +hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00300000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0xd8000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x0383059f (1440, 900)
>(II) intel(0):             DSPABASE: 0x01000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x059f0383 (1440, 900)
>(II) intel(0):            PIPEASTAT: 0x80000203 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00031209 (n = 3, m1 = 18, m2 = 9)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0xd4020000 (enabled, dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x076f059f (1440 active, 1904 total)
>(II) intel(0):             HBLANK_A: 0x076f059f (1440 start, 1904 end)
>(II) intel(0):              HSYNC_A: 0x068705ef (1520 start, 1672 end)
>(II) intel(0):             VTOTAL_A: 0x03a50383 (900 active, 934 total)
>(II) intel(0):             VBLANK_A: 0x03a50383 (900 start, 934 end)
>(II) intel(0):              VSYNC_A: 0x038c0386 (903 start, 909 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0): MI_DISPLAY_POWER_DOW: 0x00000000
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x06
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x08
>(II) intel(0):                 AR09: 0x09
>(II) intel(0):                 AR0a: 0x0a
>(II) intel(0):                 AR0b: 0x0b
>(II) intel(0):                 AR0c: 0x0c
>(II) intel(0):                 AR0d: 0x0d
>(II) intel(0):                 AR0e: 0x0e
>(II) intel(0):                 AR0f: 0x0f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x0e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x00
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 106560 n 3 m1 18 m2 9 p1 2 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output TMDS-1 is connected to pipe A
>(II) intel(0): [drm] dma control initialized, using IRQ 23
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(**) Option "dpms"
>(**) intel(0): DPMS enabled
>(II) intel(0): Set up textured video
>(II) intel(0): Set up overlay video
>(II) intel(0): direct rendering: Enabled
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension XAccessControlExtension
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension XFree86-Bigfont
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenByBusid: drmOpenMinor returns 8
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(WW) AIGLX: 3D driver claims to not support visual 0x23
>(WW) AIGLX: 3D driver claims to not support visual 0x24
>(WW) AIGLX: 3D driver claims to not support visual 0x25
>(WW) AIGLX: 3D driver claims to not support visual 0x26
>(WW) AIGLX: 3D driver claims to not support visual 0x27
>(WW) AIGLX: 3D driver claims to not support visual 0x28
>(WW) AIGLX: 3D driver claims to not support visual 0x29
>(WW) AIGLX: 3D driver claims to not support visual 0x2a
>(WW) AIGLX: 3D driver claims to not support visual 0x2b
>(WW) AIGLX: 3D driver claims to not support visual 0x2c
>(WW) AIGLX: 3D driver claims to not support visual 0x2d
>(WW) AIGLX: 3D driver claims to not support visual 0x2e
>(WW) AIGLX: 3D driver claims to not support visual 0x2f
>(WW) AIGLX: 3D driver claims to not support visual 0x30
>(WW) AIGLX: 3D driver claims to not support visual 0x31
>(WW) AIGLX: 3D driver claims to not support visual 0x32
>(II) AIGLX: Loaded and initialized /usr/lib/xorg/modules/dri/i915_dri.so
>(II) GLX: Initialized DRI GL provider for screen 0
>(II) intel(0): Setting screen physical size to 410 x 256
>(**) Option "Protocol" "ImPS/2"
>(**) Mouse0: Device: "/dev/input/mice"
>(**) Mouse0: Protocol: "ImPS/2"
>(**) Option "CorePointer"
>(**) Mouse0: always reports core events
>(**) Option "Device" "/dev/input/mice"
>(==) Mouse0: Emulate3Buttons, Emulate3Timeout: 50
>(**) Option "ZAxisMapping" "4 5 6 7"
>(**) Mouse0: ZAxisMapping: buttons 4, 5, 6 and 7
>(**) Mouse0: Buttons: 11
>(**) Mouse0: Sensitivity: 1
>(**) Option "CoreKeyboard"
>(**) Keyboard0: always reports core events
>(**) Option "Protocol" "standard"
>(**) Keyboard0: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) Keyboard0: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) Keyboard0: XkbModel: "pc105"
>(**) Option "XkbLayout" "fr"
>(**) Keyboard0: XkbLayout: "fr"
>(**) Option "CustomKeycodes" "off"
>(**) Keyboard0: CustomKeycodes disabled
>(II) evaluating device (Keyboard0)
>(II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD)
>(II) evaluating device (Mouse0)
>(II) XINPUT: Adding extended input device "Mouse0" (type: MOUSE)
>(II) Mouse0: ps2EnableDataReporting: succeeded
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 00                      (Success)
>(EE) intel(0): First SDVO output reported failure to sync
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 17 10 60 A2 00 1C 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 10 60 A2 00 1C 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 08                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x8030000c (enabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00300000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x8030000c (enabled, pipe A, no stall, +hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00300000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x18000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000c80 (3200 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x80000203 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00021509 (n = 2, m1 = 21, m2 = 9)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0xd4040033 (enabled, dvo, default clock, DAC/serial mode, p1 = 3, p2 = 10, SDVO mult 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x031f027f (640 start, 800 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020c01df (480 start, 525 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x0124008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0): MI_DISPLAY_POWER_DOW: 0x00000000
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x06
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x08
>(II) intel(0):                 AR09: 0x09
>(II) intel(0):                 AR0a: 0x0a
>(II) intel(0):                 AR0b: 0x0b
>(II) intel(0):                 AR0c: 0x0c
>(II) intel(0):                 AR0d: 0x0d
>(II) intel(0):                 AR0e: 0x0e
>(II) intel(0):                 AR0f: 0x0f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x00
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 100800 n 2 m1 21 m2 9 p1 3 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) intel(0): [drm] removed 1 reserved context for kernel
>(II) intel(0): [drm] unmapping 8192 bytes of SAREA 0xf8a14000 at 0xb7b20000
>(II) intel(0): [drm] Closed DRM master.
>FreeFontPath: FPE "/usr/share/fonts/misc" refcount is 3, should be 2; fixing.

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Attachments on bug 15108: 15311 | 15332 | 15448

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