Attachment 21407 Details for Bug 19239 – xorg.log

xorg.log

Xorg_log_2.6.99.1_inteldrv_122208_1.txt (text/plain), 21.63 KB, created by cheryl on 2008-12-22 13:00:46 UTC

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Creator: cheryl

Created: 2008-12-22 13:00:46 UTC

Size: 21.63 KB

patch

obsolete

>
>This is a pre-release version of the X server from The X.Org Foundation.
>It is not supported in any way.
>Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
>Select the "xorg" product for bugs you find in this release.
>Before reporting bugs in pre-release versions please check the
>latest version in the X.Org Foundation git repository.
>See http://wiki.x.org/wiki/GitPage for git access instructions.
>
>X.Org X Server 1.6.99.1
>Release Date: (unreleased)
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.28-rc9 i686 
>Current Operating System: Linux sylia 2.6.28-rc9 #2 Sat Dec 20 03:46:53 EST 2008 i686
>Build Date: 22 December 2008  01:53:28PM
> 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Mon Dec 22 15:45:24 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "X.org Configured"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "Monitor0"
>(**) |   |-->Device "Card0"
>(**) Option "StandbyTime" "0"
>(**) Option "SuspendTime" "0"
>(**) Option "OffTime" "5"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(==) Including the default font path built-ins.
>(**) FontPath set to:
>	/usr/X11R6/lib/X11/fonts/misc/,
>	/usr/X11R6/lib/X11/fonts/TTF/,
>	/usr/X11R6/lib/X11/fonts/OTF,
>	/usr/X11R6/lib/X11/fonts/Type1/,
>	/usr/X11R6/lib/X11/fonts/100dpi/,
>	/usr/X11R6/lib/X11/fonts/75dpi/,
>	built-ins
>(**) ModulePath set to "/usr/X11R6/lib/xorg/modules"
>(II) Cannot locate a core pointer device.
>(II) Cannot locate a core keyboard device.
>(II) The server relies on HAL to provide the list of input devices.
>	If no devices become available, reconfigure HAL or disable AllowEmptyInput.
>(II) Loader magic: 0x1edd0
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.4
>	X.Org Video Driver: 5.0
>	X.Org XInput driver : 4.0
>	X.Org Server Extension : 2.0
>(II) Loader running on linux
>(--) using VT number 8
>
>(--) PCI:*(0@0:2:0) unknown vendor (0x8086) unknown chipset (0x2592) rev 4, Mem @ 0xffe80000/524288, 0xd0000000/268435456, 0xffe40000/262144, I/O @ 0x0000ec00/8
>(--) PCI: (0@0:2:1) unknown vendor (0x8086) unknown chipset (0x2792) rev 4, Mem @ 0x20000000/524288
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) System resource ranges:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) "extmod" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dbe" will be loaded. This was enabled by default and also specified in the config file.
>(II) "glx" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dri" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dri2" will be loaded by default.
>(II) LoadModule: "glx"
>(II) Loading /usr/X11R6/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(==) AIGLX enabled
>(==) Exporting typical set of GLX visuals
>(II) Loading extension GLX
>(II) LoadModule: "extmod"
>(II) Loading /usr/X11R6/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "dbe"
>(II) Loading /usr/X11R6/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "dri"
>(II) Loading /usr/X11R6/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "dri2"
>(II) Loading /usr/X11R6/lib/xorg/modules/extensions//libdri2.so
>(II) Module dri2: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DRI2
>(II) LoadModule: "intel"
>(II) Loading /usr/X11R6/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 2.6.99
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 5.0
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33,
>	Mobile IntelÂ® GM45 Express Chipset,
>	Intel Integrated Graphics Device, G45/G43, Q45/Q43, G41
>(II) Primary Device is: PCI 00@00:02:0
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) resource ranges after probing:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/X11R6/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 5.0
>(==) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "AccelMethod" "EXA"
>(**) intel(0): Option "ModeDebug" "True"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) 915GM
>(--) intel(0): Chipset: "915GM"
>(--) intel(0): Linear framebuffer at 0xD0000000
>(--) intel(0): IO registers at addr 0xFFE80000
>(WW) intel(0): libpciaccess reported 0 rom size, guessing 64kB
>(**) intel(0): Using EXA for acceleration
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0404 (0x0404)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x01080000 (0x0000)
>(II) intel(0):               C1DRB0: 0x05040302 (0x0302)
>(II) intel(0):               C1DRB1: 0x07060504 (0x0504)
>(II) intel(0):               C1DRB2: 0x09080706 (0x0706)
>(II) intel(0):               C1DRB3: 0x0b0a0908 (0x0908)
>(II) intel(0):              C0DRA01: 0x04020108 (0x0108)
>(II) intel(0):              C0DRA23: 0x00000402 (0x0402)
>(II) intel(0):              C1DRA01: 0x0d0c0b0a (0x0b0a)
>(II) intel(0):              C1DRA23: 0x0f0e0d0c (0x0d0c)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00800080 (vga0 p1 = 2, p2 = 4, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480000 (disabled, pipe A, stall disabled, not detected, SDVO mult 1)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected, SDVO mult 1)
>(II) intel(0):              SDVOUDI: 0x00000010
>(II) intel(0):               DSPARB: 0x00002f2f
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x00000c00 (disabled, pipe A, -hsync, -vsync)
>(II) intel(0):                 LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
>(II) intel(0):         PP_ON_DELAYS: 0x00961130
>(II) intel(0):        PP_OFF_DELAYS: 0x00960fff
>(II) intel(0):           PP_DIVISOR: 0x0029991c
>(II) intel(0):         PFIT_CONTROL: 0x00000008
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x58000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x03ff04ff (1280, 1024)
>(II) intel(0):             DSPABASE: 0x04028000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x04ff03ff (1280, 1024)
>(II) intel(0):            PIPEASTAT: 0x00000000 (status:)
>(II) intel(0):                 FPA0: 0x00020e08 (n = 2, m1 = 14, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x14020000 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x06af04ff (1280 active, 1712 total)
>(II) intel(0):             HBLANK_A: 0x06af04ff (1280 start, 1712 end)
>(II) intel(0):              HSYNC_A: 0x05d70557 (1368 start, 1496 end)
>(II) intel(0):             VTOTAL_A: 0x044f03ff (1024 active, 1104 total)
>(II) intel(0):             VBLANK_A: 0x044f03ff (1024 start, 1104 end)
>(II) intel(0):              VSYNC_A: 0x04090402 (1027 start, 1034 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000000 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x031f04ff (1280, 800)
>(II) intel(0):             DSPBBASE: 0x03000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00020c08 (n = 2, m1 = 12, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x057f04ff (1280 active, 1408 total)
>(II) intel(0):             HBLANK_B: 0x057f04ff (1280 start, 1408 end)
>(II) intel(0):              HSYNC_B: 0x05370517 (1304 start, 1336 end)
>(II) intel(0):             VTOTAL_B: 0x032c031f (800 active, 813 total)
>(II) intel(0):             VBLANK_B: 0x032c031f (800 start, 813 end)
>(II) intel(0):              VSYNC_B: 0x03230320 (801 start, 804 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00800080
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x000c0c00
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x0332012d
>(II) intel(0):            TV_CSC_Y2: 0x07d30104
>(II) intel(0):             TV_CSC_U: 0x0733052d
>(II) intel(0):            TV_CSC_U2: 0x05c70200
>(II) intel(0):             TV_CSC_V: 0x0340030c
>(II) intel(0):            TV_CSC_V2: 0x06d00200
>(II) intel(0):         TV_CLR_KNOBS: 0x00606000
>(II) intel(0):         TV_CLR_LEVEL: 0x010b00e1
>(II) intel(0):           TV_H_CTL_1: 0x00400359
>(II) intel(0):           TV_H_CTL_2: 0x80480022
>(II) intel(0):           TV_H_CTL_3: 0x007c0344
>(II) intel(0):           TV_V_CTL_1: 0x00f01415
>(II) intel(0):           TV_V_CTL_2: 0x00060607
>(II) intel(0):           TV_V_CTL_3: 0x80120001
>(II) intel(0):           TV_V_CTL_4: 0x000900f0
>(II) intel(0):           TV_V_CTL_5: 0x000a00f0
>(II) intel(0):           TV_V_CTL_6: 0x000900f0
>(II) intel(0):           TV_V_CTL_7: 0x000a00f0
>(II) intel(0):          TV_SC_CTL_1: 0xc1710087
>(II) intel(0):          TV_SC_CTL_2: 0x6b405140
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00360024
>(II) intel(0):          TV_WIN_SIZE: 0x02640198
>(II) intel(0):      TV_FILTER_CTL_1: 0x800010bb
>(II) intel(0):      TV_FILTER_CTL_2: 0x00028283
>(II) intel(0):      TV_FILTER_CTL_3: 0x00014141
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0xb1403000
>(II) intel(0):         TV_H_LUMA_59: 0x0000b060
>(II) intel(0):        TV_H_CHROMA_0: 0xb1403000
>(II) intel(0):       TV_H_CHROMA_59: 0x0000b060
>(II) intel(0):         FBC_CFB_BASE: 0x1f000000
>(II) intel(0):          FBC_LL_BASE: 0x1f600006
>(II) intel(0):          FBC_CONTROL: 0x43e847e2
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 0: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 1: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 1: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 2: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 2: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 3: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 3: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 4: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 4: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 5: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 5: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 6: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 6: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 7: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 7: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 8: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 8: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 9: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 9: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 10: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 10: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 11: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 11: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 12: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 12: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 13: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 13: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 14: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 14: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 15: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 15: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0): pipe A dot 108000 n 2 m1 14 m2 8 p1 2 p2 10
>(II) intel(0): pipe B dot 71428 n 2 m1 12 m2 8 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"
>(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"
>(II) Module "i2c" already built-in
>(II) intel(0): Output VGA using monitor section Monitor0
>(II) intel(0): Output LVDS using monitor section LVDS
>(II) intel(0): I2C bus "LVDSDDC_C" initialized.
>(II) intel(0): Attempting to determine panel fixed mode.
>(II) intel(0): I2C device "LVDSDDC_C:E-EDID segment register" registered at address 0x60.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): EDID vendor "CPT", prod id 5040
>(II) intel(0): Output TV using monitor section TV
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): I2C bus "CRTDDC_A" removed.
>(II) intel(0): EDID for output VGA
>(II) intel(0): LID switch detect closed with ACPI button
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): Adjusted mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  108.00  1280 1368 1496 1712  1024 1027 1034 1104 (63.1 kHz)
>(II) intel(0): chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): EDID for output TV
>(II) intel(0): Output VGA disconnected
>(II) intel(0): Output LVDS disconnected
>(II) intel(0): Output TV disconnected
>(WW) intel(0): No outputs definitely connected, trying again...
>(II) intel(0): Output VGA disconnected
>(II) intel(0): Output LVDS disconnected
>(II) intel(0): Output TV disconnected
>(WW) intel(0): Unable to find initial modes
>(EE) intel(0): No valid modes.
>(II) UnloadModule: "intel"
>(II) UnloadModule: "vgahw"
>(II) Unloading /usr/X11R6/lib/xorg/modules//libvgahw.so
>(EE) Screen(s) found, but none have a usable configuration.
>
>Fatal server error:
>no screens found
>
>Please consult the The X.Org Foundation support 
>	 at http://wiki.x.org
> for help. 
>Please also check the log file at "/var/log/Xorg.0.log" for additional information.
>

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Attachments on bug 19239: 21407 | 21408 | 21454 | 21455 | 21459 | 21473 | 21474

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