Attachment 5491 Details for Bug 6761 – Patch to fix cache handling in non-DRI mode.

[patch] Patch to fix cache handling in non-DRI mode.

radeon-3d-dstcache.diff (text/plain), 1.39 KB, created by Eric Anholt on 2006-04-27 11:57:29 UTC

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Creator: Eric Anholt

Created: 2006-04-27 11:57:29 UTC

Size: 1.39 KB

patch

obsolete

>Index: radeon_accel.c
>===================================================================
>RCS file: /cvs/xorg/driver/xf86-video-ati/src/radeon_accel.c,v
>retrieving revision 1.24
>diff -u -r1.24 radeon_accel.c
>--- radeon_accel.c	22 Mar 2006 22:30:14 -0000	1.24
>+++ radeon_accel.c	27 Apr 2006 00:47:51 -0000
>@@ -156,16 +156,16 @@
>     unsigned char *RADEONMMIO = info->MMIO;
>     int            i;
> 
>-    OUTREGP(RADEON_RB2D_DSTCACHE_CTLSTAT,
>-	    RADEON_RB2D_DC_FLUSH_ALL,
>-	    ~RADEON_RB2D_DC_FLUSH_ALL);
>+    OUTREGP(RADEON_RB3D_DSTCACHE_CTLSTAT,
>+	    RADEON_RB3D_DC_FLUSH_ALL,
>+	    ~RADEON_RB3D_DC_FLUSH_ALL);
>     for (i = 0; i < RADEON_TIMEOUT; i++) {
>-	if (!(INREG(RADEON_RB2D_DSTCACHE_CTLSTAT) & RADEON_RB2D_DC_BUSY))
>+	if (!(INREG(RADEON_RB3D_DSTCACHE_CTLSTAT) & RADEON_RB3D_DC_BUSY))
> 	    break;
>     }
>     if (i == RADEON_TIMEOUT) {
> 	RADEONTRACE(("DC flush timeout: %x\n",
>-		    INREG(RADEON_RB2D_DSTCACHE_CTLSTAT)));
>+		    INREG(RADEON_RB3D_DSTCACHE_CTLSTAT)));
>     }
> }
> 
>@@ -256,8 +256,8 @@
> 					RADEON_SOFT_RESET_E2));
> 	INREG(RADEON_RBBM_SOFT_RESET);
> 	OUTREG(RADEON_RBBM_SOFT_RESET, 0);
>-	tmp = INREG(RADEON_RB2D_DSTCACHE_MODE);
>-	OUTREG(RADEON_RB2D_DSTCACHE_MODE, tmp | (1 << 17)); /* FIXME */
>+	tmp = INREG(RADEON_RB3D_DSTCACHE_MODE);
>+	OUTREG(RADEON_RB3D_DSTCACHE_MODE, tmp | (1 << 17)); /* FIXME */
>     } else {
> 	OUTREG(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset |
> 					RADEON_SOFT_RESET_CP |

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